This chapter describes the Frame Buffer section.
The Frame Buffer, shown in Figure 8-1, stores all the pixel data: alpha, red, green, blue, depth (Z), overlay, window ID, and fast clear. The frame buffer consists of 96 planes of 1280 by 1024 memory, organized as follows:
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Type Number Description/Normal Configuration of Planes ------------------------------------------------------------------------------
Image 48 Holds the color value for each pixel. Organized as
two buffers of 24 planes each
Overlay 8 The overlay data can be transparent or solid.
Organized as two buffers of four planes each.
Depth 24 Holds the depth value for the last pixel written into
the current write buffer.
P window ID 6 Stores the window ID code for windows used by the
accelerator port processes. Known as the PWID.
Q window ID 4 Stores the window ID code for windows used by the
direct port processes. Known as the QWID.
Fast clear 6 Used to implement the fast clear feature for three
selected double-buffered image windows.
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Figure 8-1 Frame Buffer Block Diagram
The Frame Buffer is a combination of VRAM (video RAM) and DRAM (dynamic RAM) devices. The Depth memory planes use 256K by 16-bit DRAMs, all other planes use 256K by 8-bit VRAMs. The memory chips are organized into five banks, where each bank has its own RAS line.
The depth memory (upper board schematic sheet8) is nominally organized as a single two-dimensional array of 1280 pixels by 1024 lines. However, the depth memory can also be reconfigured to support certain other resolutions, such as stereo. The depth memory is 30 megabits (1280 \xb4 1024 \xb4 24-bits). Since the depth memory array is equivalent to one of the image memory buffers, the depth memory is shared between two image buffers.
Figure 8-2 shows the depth memory interface. Note that there is no LeoCross interface to the depth memory. The depth memory is used solely by LeoDraw for use in hidden-surface removal or as a window ID (WID) extension. These two modes are mutually exclusive.
When used for hidden surface removal (HSR), LeoDraw compares the depth value in memory (the old pixel) with the depth value of a new pixel to be written into the image memory. To do the comparison, LeoDraw does a read- modify-write (RMW) memory cycle. If the result of the comparison indicates that the depth value of the new pixel is less than that of the old pixel, the new pixel is written into the image and depth memories.
When used as a WID extension, the depth memory greatly expands the number of clipping ID (but not the window attribute controls).
The depth banks are made up of ten 256K by 16-bit fast page DRAM chips; two DRAMs in each of the five banks. Note that only eight of the 16 data bits are used on one of the DRAMs in each interleave. This is due to the fact that Leo uses 16-bit DRAMs, and the depth memory uses only 24 out of the available 32 bits (from two DRAMs).
Figure 8-2 Depth Memory Interface Block Diagram
The image memory consists of U0901 through U0906, U1001 through U1006, U1101 through U1106, U1201 through U1206, and U1301 through U1306 on the upper board schematic.
The Image memory is normally configured as two 1280-pixels by 1024-lines two-dimensional arrays (double buffered), identified as buffer A and buffer B. The image planes store data using one of three color models: 24-bit RGB true color, 12-bit (4-4-4 RGB) true color, or eight-bit indexed color. The color model is selected on a per pixel basis by the Image Window ID planes. The Image memory is 60 megabits (1280 \xb4 1024 \xb4 2 \xb4 24-bits).
Normally, the image memory is configured as two 1024 by 1280 (double- buffered) arrays, as shown below:
LeoDraw may reconfigure the image memory to appear as four 960 by 680 two-dimensional arrays (quad buffered for stereo):
The ability to reconfigure the image memory aspect ratio and the ability to program the screen refresh circuitry allows the frame buffer to support several different screen resolutions.
Figure 8-3 shows the image memory interface. The format of the R, G, and B data on the data lines between image memory and LeoCross and between image memory and LeoDraw, is as follows:
The Image memory is made up of 30 256K by 8-bit VRAM chips; six chips in each of the five interleaves.
Figure 8-3 Image Memory Interface Block Diagram
The overlay memory consists of U0907, U1007, U1107, U1207, and U1307 on the upper board schematic. The overlay memory, shown in Figure 8-4, consists of eight planes, organized as two buffers (A and B) of four planes each. The eight overlay planes can be thought of as an extra eight-bit indexed color buffer. The overlay data can be transparent or solid; the overlay plane can be made visible or invisible.
Changing the contents or visibility of the overlay buffer does not alter the image buffer contents. The overlay is used to run the user's desktop and other applications not requiring 3D graphics acceleration.
The Overlay memory is made up of five 256K by 8-bit VRAM chips; one chip in each of the five interleaves.
Figure 8-4 Overlay Memory Interface Block Diagram
The window ID planes consist of U0909, U1009, U1109, U1209, and U1309, and two out of eight bits on each of U0908, U1008, U1108, U1208, and U1308 on the upper board schematic.
The ten window ID planes are divided into six P window ID planes (PWID) and four Q window ID planes (QWID), as follows:
LX_WID<9:6 = Q window ID code.
When not zero, the QWID code in the window ID planes selects one of 15
locations in the QWID lookup table (LUT).
LX_WID<5:0 = P window ID code.
When the Q window ID code is zero, the P window ID code selects one of
64 locations in the PWID lookup table (LUT).
During image and depth plane writes, the current WID code is compared with the stored image WID code for each pixel; writes are not done if the two codes do not match.
During display cycles, the stored overlay WID code is used to determine overlay transparency; the stored image WID code is used to specify the current image display buffer and the output color model for each pixel on the screen.
Figure 8-5 shows the window ID memory interface block diagram. The window ID memory is made up of ten 256K by 8-bit VRAM chips; two chips in each of the five interleaves.
Note - One VRAM chip in each interleave is shared with the fast clear plane. In this chip, two bits are used for the window ID, five bits are used for the fast clear plane.
Figure 8-5 Window ID Memory Interface Block Diagram
The fast clear memory consists of six of the eight bits on U0908, U1008, U1208, and U1308 on the upper board schematic. The six fast clear planes are used to implement the Fast Clear feature for three selected double-buffered image windows. Each fast clear plane pair can be assigned to clear one double- buffered window at hardware speeds.
Before the start of a new frame, the appropriate fast clear plane is cleared to all zeros (using a special high-speed clear mode known as "flash write") indicating that the values stored in the image and depth planes are invalid for the specified WID.
As pixels are rendered into the image buffer, a one is written into the fast clear plane at the pixel location, indicating that the image and depth are now valid. During display refresh, all valid pixels (fast clear = 1) are displayed using the color value stored in the image or overlay buffers. Invalid pixels (fast clear = 0) are displayed using the color value stored in the Fast Clear Background Color Register assigned to that fast clear set.
Figure 8-6 shows the fast clear memory interface block diagram.
The fast clear memory is made up of five 256K by 8-bit VRAM chips; one chip in each of the five interleaves.
Note - The fast clear VRAM chip in each interleave is shared with the window ID plane. In this chip, two bits are used for the window ID, five bits are used for the fast clear plane.
Figure 8-6 Fast Clear Memory Interface Block Diagram
